LF-X1 — entertrainment

PROJECT REVIEW · 18 October 2026

Inside the project

Prepared with the project’s development agent from source and retained evidence. This is a project-owner assessment, not an independent customer review. Dated checks were not rerun for this website.

LF-X1 is useful today as a worked, checked engineering pack for a DC–1 kHz precision ELF/VLF transceiver that shares a 10 MHz reference with a HackRF One. Its value at this stage is the rigour of the paperwork rather than any instrument: every numerical claim in the originating brief has been recomputed by a script that reports 71 checks and 0 discrepancies, the one wrong circuit in the brief (a multiple-feedback low-pass sketch) has been re-derived from node analysis and proven numerically against the ideal sixth-order Butterworth response to within 1e-3 dB at seven frequencies, and the work ahead is organised into ten phases with explicit acceptance gates, safety limits and an evidence discipline that forbids quoting a datasheet number as a result. What actually runs is two Python tools. There is no firmware, no Swift host library, no SPICE fixture, no schematic and no hardware. The next priorities are, in order: integrate the staged Phase 0 evidence after addressing its review findings; build the Phase 1 simulation fixtures in the Circuit Lab engine with ngspice as oracle; start the LFX1Kit Swift DSP package with its analytic test fixtures; and obtain the owner's five open design decisions before any schematic capture.

What stands out

Physics check script: 71 recomputed claims, 0 discrepancies (simulated, 2026-10-17).
Corrected MFB filter design with a --check gate that exits non-zero unless the realised cascade matches the ideal response within 1e-3 dB at 100 Hz to 10 kHz (simulated, 2026-10-17).
Phased roadmap with measurable gates; nothing physical is bought before Phase 3's gate.
Hard safety constraints written as design rules: never mains, never a living subject, never an antenna; transmitter output default-disabled by hardware interlock.
Evidence conventions requiring sha256 manifests, exact command logs and one of four status words on every number.

Current limits

Design pack only: no measured performance exists; every figure is a target or a simulation.
Phase 0 evidence is staged but not integrated; the mission branch still points at the base commit c8bf5e4 on 2026-10-18.
The Phase 0 change received a 'concerns' review on 2026-10-17: its acceptance table cites corrections C1a and C5a that exist nowhere in the pack, the manifest digests were not independently verified, and the pack's documents say the filter cascade has net gain +1 while the corrected tool reports net gain −1 (unity magnitude).
Five owner decisions remain open: ADC topology, input modes, Nucleo-first bring-up, power source, wideband deferral.
BOM is candidates only; the £250–£650 budget is unverified.
No images, audio, video or public links exist for this project.

Features & evidence

Physics verification tool (tools/check_physics.py)

component-tested

Recomputes every numerical claim in the brief and prints OK or discrepancy per row.

Recorded evidence

Evidence-Phase0/check-physics.txt, run 2026-10-17 with python3 -I, exit 0, '71 checks, 0 discrepancies' (simulated). Source committed in c8bf5e4; not released.

MFB filter designer with check gate (tools/design_mfb.py --check)

component-tested

Designs three second-order MFB sections for a sixth-order Butterworth, prints values and cascade response, exits non-zero if any acceptance frequency misses 1e-3 dB.

Recorded evidence

Evidence-Phase0/design-mfb-check.txt, run 2026-10-17, exit 0, 'PASS (7/7 magnitude frequencies within tolerance)' (simulated). The --check mode is a staged, uncommitted change under review.

Evidence conventions (Verification/Evidence-Conventions.md)

source

Defines per-phase evidence folders, sha256 manifests, command-log format and mandatory status words.

Recorded evidence

Staged 2026-10-17, uncommitted; manifest.sha256 lists five Phase 0 files.

Precision receiver chain RX-A01/A02/A03

planned

AD8421 gain-10 input, sixth-order 1 kHz MFB Butterworth, differential driver, AD7175-2 24-bit ADC.

Recorded evidence

Specifications and simulation acceptance tables only (Modules/RX-A01.md, RX-A02.md, RX-A03.md, committed 2026-10-17). No fixture run.

Precision transmitter TX-A01

planned

DAC80502, 5 kHz reconstruction filter, bipolar buffer, 5 mA active limit, default-open disconnect, shunt monitor.

Recorded evidence

Modules/TX-A01.md, committed 2026-10-17. No simulation run.

Controller CTRL-A01 and firmware

planned

STM32H743 timing engine, 64-bit timestamps, DMA-paced DAC, hardware interlock AND, USB streaming.

Recorded evidence

Modules/CTRL-A01.md and Firmware-Plan.md, committed 2026-10-17. No code.

Host DSP package LFX1Kit

planned

NCO, three lock-in modes, multitone, Allan deviation, calibration records, protocol codec, device simulator, lfx1 CLI.

Recorded evidence

Host-Software-Plan.md, committed 2026-10-17. No Swift source exists.

Wideband 1 MHz path and RF translation module

planned

Daughterboards for 1 kHz–1 MHz acquisition and HackRF frequency translation.

Recorded evidence

Roadmap.md phases 8–9; deferred by design.

Review updates & corrections

No repository change: HEAD and branch ccx/mission-19be200c remain at c8bf5e4; the Phase 0 files remain staged and uncommitted on 2026-10-18.
Material correction to the biography's maturity line: the Phase 0 change is not simply 'awaiting integration'; it carries an open 'concerns' review (2026-10-17) with three findings (non-existent corrections C1a/C5a cited in Acceptance.md, unverified manifest digests, net-gain sign inconsistency between documents and tool). Integration is the owner's decision after those are addressed.
The published site page content/lf-x1.md already carries the biography; this packet adds the review, feature table and demo references and should not repeat the biography.

Workflow walkthrough

A guide to the native workflow. These steps describe the app; only the recordings and images embedded on this page are available as website demonstrations.

Open the pack and read Review-and-Corrections.md, then Roadmap.md, to see the verdict, the ten corrections and the phase gates.
Run python3 -I tools/check_physics.py and read the 71 OK rows ending '71 checks, 0 discrepancies'.
Run python3 -I tools/design_mfb.py 1000 10 --check and read the three section tables, the cascade response equal to the ideal at eight frequencies, and 'Check result: PASS (7/7)'.
Open Evidence-Phase0/Acceptance.md to see each gate row marked met and linked to its log.
Verify the evidence set with shasum -a 256 -c Evidence-Phase0/manifest.sha256 from the repository root.
Demo status: proposed capture that does not exist. Steps 2–3 could become a static text transcript on the website (the transcripts already exist, see demos); there is no playable or interactive demo and no native capture.

Planned captures · not yet available

Proposed: a plotted magnitude response of the designed cascade against the ideal Butterworth curve, from the design_mfb.py output.

Development biography · earlier archive

Development profile compiled from project source and retained records in October 2026. Dates and test results describe those records; they do not imply a new build, live acceptance test or public release.

Project identity: LF-X1, "precision ELF/VLF transceiver and measurement instrument" . Registry workspace 076c99be-6481-49f1-a217-c777715d6e2b is a ccx mission worktree (branch ccx/mission-19be200c) holding this project; the folder name is not the project name. Sources: every file in the repository at commit c8bf5e4 plus the staged Phase 0 evidence. Read-only; nothing built or run.

Origin and purpose

The pack was assembled on 2026-10-17 from a supplied engineering brief, "HackRF One ELF/VLF-X: Full Bidirectional Extension Specification, Revision 0.1", preserved verbatim in Source/Original-Specification.txt . The brief's central principle, kept by the pack, is that the HackRF "should not be responsible for measurements it is poorly suited to make" (Source/Original-Specification.txt:7); the extension is an independent scientific instrument sharing only timing, signal generation and software with the HackRF .

The review found the architecture sound and the arithmetic correct throughout, but one circuit wrong and several decisions contradictory . The pack resolves them and organises the work into ten phases with acceptance gates.

Audience

The pack is written for an implementer working in a Codex session and for the project owner, who must close five open decisions before schematic capture . Users of the eventual instrument are laboratory experimenters measuring low-voltage circuits and passive electromagnetic sensors. It is explicitly never for people, animals, mains or antennas .

Features (as specified; none yet realised in hardware)

Precision receiver chain: protected differential input → AD8421 at gain 10 → sixth-order 1 kHz MFB Butterworth → fully differential driver at 2.5 V common mode → AD7175-2 24-bit ΔΣ ADC over isolated SPI .
Precision transmitter: DAC80502 → fourth-order 5 kHz reconstruction filter → bipolar buffer → active 5 mA current limit → default-open output disconnect, with a shunt monitor used for every amplitude calibration .
Hardware interlocks: output enable is a hardware AND of MCU request, watchdog, current, voltage and temperature OK with a latching fault; default disabled .
Timing engine: STM32H743 with a 100 MHz timer base extended to 64 bits, ADC data-ready captured in hardware, DAC updates timer-paced through DMA .
Host DSP (planned Swift package LFX1Kit): 64-bit NCO, lock-in in three modes, multitone crest-factor optimiser, Allan deviation, cross-spectrum and coherence, NLMS canceller, versioned calibration records, binary protocol with CRC32, and a software device simulator .
Magnetic sensing: search-coil input, fluxgate or magnetoresistive DC path, noise-weighted sensor fusion .
Deferred paths: 1 kHz–1 MHz wideband daughterboard and an optional RF translation module to the HackRF .

User workflow (as planned)

Read Review-and-Corrections.md, then Roadmap.md; run python3 -I tools/check_physics.py and python3 -I tools/design_mfb.py 1000 10 to confirm the environment .
Work one git worktree per phase; deliver each phase as one commit with an Evidence-<phase>/ folder, sha256 manifest, command logs and a filled acceptance table .
Simulate every analogue module in the studio’s Circuit Lab engine with ngspice as oracle, then vendor SPICE models in plain ngspice .
Bring up firmware on a Nucleo-H743ZI2 with evaluation boards before any custom PCB .
Only after Phases 1–3 pass and the owner closes the five decisions: schematic capture, prototype, characterisation, transmitter board, then the wideband and magnetic phases .
Every reported number carries one status word: simulated, measured on evaluation hardware, measured on prototype, or calibrated .

(continued in part 2)

Architecture and foundations

Three boards : Board A precision receiver (RX-A01 input amplifier, RX-A02 anti-alias filter, RX-A03 ADC interface with ADR4525 reference and calibration mux), Board B controller CTRL-A01 (STM32H743ZIT6, USB-C FS, 10 MHz out to HackRF CLKIN, trigger in/out), Board C transmitter TX-A01. Separate RX and TX connectors in Rev A. Power: ±5 V analogue via boost/inverter pre-regulators then LT3042/LT3094 LDOs; 3.3 V digital; two separate ADR4525 references never tied together .

Mathematical foundations are collected in Physics-and-Maths.md: Johnson noise and ENBW, flicker models, Butterworth design with Q = 0.517638/0.707107/1.931852, the corrected multiple-feedback low-pass derivation by KCL (§6), ZOH images, NCO and unity-reference lock-in convention (§8), Faraday coil sensing, calibration and Allan deviance (§11), isolation and NLMS limits (§12).

Local packages in this repository: none. The repository contains Markdown specifications and two Python tools (tools/check_physics.py, tools/design_mfb.py). The Swift package LFX1Kit (targets LFX1Protocol, LFX1DSP, LFX1Calibration, LFX1Device, LFX1Simulator, lfx1 CLI) is specified in Host-Software-Plan.md:3-12 but not yet written. Firmware tree is specified in Firmware-Plan.md:7-17, not written.

External dependencies recorded: the studio’s Circuit Lab engine at the project archive packages CircuitLabCircuits, CircuitLabComponents, CircuitLabAudio, at commit bc3c591974cecdaadd6126c44c4d4cd24280f385 (Evidence-Phase0/engine-path.txt:1-2); ngspice 47 at /opt/homebrew/bin/ngspice (Evidence-Phase0/ngspice-version.txt).

Current maturity, with dated evidence

2026-10-17: pack assembled, reviewed and committed as c8bf5e4 "LF-X1 pack: roadmap, physics review, module specs, verification, firmware, host, BOM, safety" . Status line: "pack prepared and verified; no hardware designed, simulated or built yet" .
2026-10-17, Phase 0 (staged, awaiting review/integration in ccx mission m-19be200c): check_physics.py reports "71 checks, 0 discrepancies" (Evidence-Phase0/check-physics.txt:80, simulated); design_mfb.py --check reports "PASS (7/7 magnitude frequencies within tolerance)" at 1e-3 dB for 100 Hz–10 kHz (Evidence-Phase0/design-mfb-check.txt:36, simulated); ngspice-47 recorded; engine commit recorded; Verification/Evidence-Conventions.md written; Evidence-Phase0/Acceptance.md marks all five gate rows met.
Phases 1–9: not started. No SPICE fixtures, no Swift code, no firmware, no hardware, no parts ordered.

Key corrected result: the brief's MFB filter sketch was invalid; the pack's derived design for 1 kHz, C2 = 10 nF gives section values R1/R2/R3 = 24473.6/3136.4/24473.6 Ω (C1 33 nF), 15597.1/3455.4/15597.1 Ω (47 nF), 5390.6/1423.9/5390.6 Ω (330 nF), matching the ideal sixth-order Butterworth to 0.000000 dB at every acceptance frequency (Evidence-Phase0/design-mfb-check.txt:13-35, simulated).

Roadmap

0 tooling and conventions (done, pending integration) → 1 simulation fixtures for every analogue module → 2 LFX1Kit host DSP library with analytic fixtures → 3 firmware and hardware-in-the-loop on Nucleo-H743ZI2 + EVAL-AD7175-2SDZ + DAC80502EVM → 4 KiCad schematic capture and BOM freeze → 5 receiver prototype bring-up → 6 characterisation and calibration (Allan deviation to 10⁴ s) → 7 TX-A01 board, impedance spectroscopy, 10 MHz reference to HackRF → 8 wideband 1 MHz daughterboard → 9 magnetic sensing and optional RF translation. Phases 1 and 2 may run in parallel; nothing physical is bought before Phase 3's gate .

Limits

A design pack only: every performance figure is a target or a simulation, none is measured .
Five decisions are open for the owner: ADC topology (two AD7175-2 or ADS131M04-class), input modes for Rev A, Nucleo-first bring-up, power source, wideband deferral .
Input impedance is ≈ 20 kΩ in the low-impedance mode; the brief's ≥ 1 MΩ is a separate, later path .
BOM is candidates only; the £250–£650 budget is unverified .
Simulation cannot establish sub-1 Hz noise, real protection leakage, PCB parasitics or ADC group delay .
Minor documentation inconsistency: the pack says the three inverting MFB sections give net gain +1 , while the updated design tool reports net gain −1 with unity magnitude; the tool is correct.

FAQs

Is it a HackRF add-on? No; it is an independent instrument that shares a 10 MHz reference, triggers and host software with the HackRF . Does "24-bit" mean 24-bit accuracy? No; noise-free resolution is measured, and 1 µV rms on a 5 V span is about 19.5 bits . Can I connect it to electrodes or mains? Never . Which simulator? The owner's Circuit Lab engine with ngspice as oracle, plus vendor SPICE models in ngspice; not the CircuitLab web simulator . Why MFB instead of Sallen-Key? Unity section gain, no attenuator, lower Q sensitivity, better headroom . What runs today? Two Python scripts; everything else is specification.